#computerarchitecture

13 posts

@lobsters How can undefined opcodes ud0 and ud1 have parameters? #Assembly #Opcodes #ComputerArchitecture
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Oct 8, 2026
@hackernews Gallery of Processor Cache Effects #HackerNews #Tech #ComputerArchitecture
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Oct 4, 2026
@lobsters RAMINDEX and the Cortex-A76 L1I Cache #ComputerArchitecture #Cache #Assembly
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Sep 11, 2026
@lobsters x86 evolution for segmentation and paging #Programming #Assembly #ComputerArchitecture
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Sep 8, 2026
@hackernews The Anatomy of an Instruction Pipeline Hazard #HackerNews #Tech #ComputerArchitecture
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Jul 14, 2026
@hackernews Eternal Software Initiative Based on Subleq One-Instruction-Set Computer #HackerNews #Tech #ComputerArchitecture
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Jul 6, 2026
@hackernews NUMA: Cores, memory, and the distance between them #HackerNews #Tech #ComputerArchitecture
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Jun 24, 2026
@hackernews 80386 Early Start Memory Access #HackerNews #Tech #ComputerArchitecture
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Jun 23, 2026
@hackernews 8086 Segmented Memory was a good idea #HackerNews #Tech #ComputerArchitecture
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Jun 21, 2026
@hackernews The ISA Doesn't Matter Where It Counts #HackerNews #Tech #ComputerArchitecture
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Jun 19, 2026
@hackernews 80386 Memory Pipeline #HackerNews #Tech #ComputerArchitecture
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Apr 14, 2026
@hackernews Modern Microprocessors – A 90-Minute Guide #HackerNews #Tech #ComputerArchitecture
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Apr 12, 2026
@hackernews Long Instruction Word architectures and the ELI-512 #HackerNews #Tech #ComputerArchitecture
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Apr 11, 2026